PLD/ASIC SOLUTIONS

Enhanced COTS Initiative Brings Programmable Logic to the Military

For several years now defence contractors have looked to use Commercial Off-The-Shelf (COTS) design methodologies to implement their systems, and in the process gain benefits from using new technology and the economies of scale which come with commercially available components, boards, and systems. Altera can help military and aerospace designers using an Enhanced COTS methodology.

The company’s Enhanced COTS Initiative offers Altera FPGAs and structured ASICs with enhanced feature sets to support military and aerospace applications, beyond standard COTS requirements and beyond competitive offerings. Device features include anti-tampering design security, extended lifecycle and temperature qualification with quality and reliability levels for rugged environments (including AQEC and ITAR compliance), and lead-based packaging. On-chip Single-Event Upset (SEU) detection and mitigation further enhances reliability.



These product-level features are supplemented, where necessary, by a worldwide partner programme, that provides product change notifications and updates, a reliable supply chain, a range of tools and IP support.

To ease the task of system design, Altera employs a two-pronged strategy: working with the leading third party tools vendors on one hand and delivering a full suite of its own system building tools on the other. These include the DSP Builder system-level tool that helps link The MathWorks MATLAB/Simulink tools to Quartus™ II (see link below).

SOPC Builder is Altera’s system building tool that helps integrate embedded processors and other blocks (see link below). Finally, the company’s C-to-Hardware Compiler (C2H) allows designers to enhance the performance of C code running on an embedded processor by converting it to a hardware accelerator module (see link below).

As well as tools, Altera and its partners provide a rich portfolio of Intellectual Property (IP) cores and reference designs that can help in military applications. These range from basic DSP building blocks such as FIR filters through Forward Error Correction cores and codecs, and include floating point arithmetic, multiplication and Fast Fourier Transform (FFT) cores.

The Enhanced COTS Initiative is rounded out by the Altera device offering itself. The company offers a wide variety of PLD devices in industrial (-40°C to +100°C) and extended (-40°C to +125°C) temperature ranges, and select devices in military-grades (-55°C to +125°C). Designers can seamlessly migrate their designs from a Stratix™ or Stratix II FPGA to a Hardcopy™ or Hardcopy II structured ASIC, giving SEU immunity and design security.

Enhanced COTS Initiative

• Worldwide COTS board partner program
• Anti-tampering design security
• Military-grade devices
  • Extended lifecycle
  • Military temperature support
  • Quality and reliability levels for rugged environments
• Product change notifications/updates
• Advanced fabrication and packaging
• Lead packaging
• Reliable supply chain
• AQEC/ITAR compliance
• On-chip SEU detection and mitigation
• Altera is working with CESG and NSA to ease customer approval time

IP support

• Floating-point FFT
• Fixed-point FFT
• Floating point arithmetic functions
• Finite Impulse Response filter (FIR)
• COordinate Rotation DIgital Computer (CORDIC)
• Numerically Controlled Oscillator (NCO)
• Viterbi encoder/decoder
• Reed-Solomon encoder/decoder
• AES and DES cryptoprocessors

For further information, including the Altera Enhanced COTS Brochure, please click here.