High Speed ADCs Combine Undersampling Performance with Extremely Low Power
Suit modem and basestation applications
A new family of high speed Analogue to Digital Converters (ADCs) from Linear Technology combines outstanding undersampling capability with extremely low power, making them highly suitable for a wide range of wireless and cable communications systems. The LTC®2242-12 family includes devices ranging from 170MSPS (Million Samples Per Second) up to 250MSPS at 12-bit and 10-bit resolution.
This new family of 2.5V converters features significantly lower power than competing devices without sacrificing AC performance. Optimised for undersampling, they are well suited for communications applications such as WCDMA cellular basestation transceivers, power amplifier linearisation, and cable modem termination systems.
In a 9mm x 9mm QFN package and with an active power consumption of just 740mW, the LTC2242-12, 12-bit, 250MSPS device offers over 65.3dB SNR up to 140MHz input. With a 1.2GHz full power bandwidth, the LTC2242-12 is suitable for undersampling applications up to 1GHz input frequency, moving the ADC closer to the antenna for cost and space savings.
Although the fundamental ideas behind RF down-conversion have remained consistent across the years, the performance requirements placed on ADCs within such systems have recently evolved dramatically. Components must offer faster sampling rates to support wider signal bandwidths, increased resolution and dynamic range to resolve more complex modulation schemes, and higher input bandwidth to accommodate frequency planning for novel communications standards. Each of these needs directly competes with the requirement for low power consumption.
High speed ADCs play an important role in both the receive and transmit paths of wireless infrastructure for 3G and future standards. While previous generation designs extensively used high power ADCs that dissipate over 1500mW of power, there is an industry-wide trend toward low power ADCs that still deliver high performance. This is especially true in metropolitan regions that require a dense network of micro and pico base stations to maintain quality of service. Along with the obvious need for low power operation, these small size basestations place additional limitations on the heat dissipation of core components, which often becomes the limiting factor for integration.
The challenge for designers of low power, high performance ADCs is to also reduce the noise contribution of the device to maintain an adequate Signal-to-Noise Ratio (SNR). The low power benefit of scaling to a 2.5V process is dramatic, yet the SNR performance of Linear Technology’s 2.5V ADCs is competitive with that of competitive 5V ADCs.
Features
Pin-compatible high speed, low power ADC range
64-pin 9mm × 9mm QFN
250MSPS, 210MSPS, 170MSPS
12-bit and 10-bit resolution
65.1dB SNR up to 250MHz Input
78dB SFDR
1.2GHz full power bandwidth S/H
Single 2.5V supply
Low power dissipation: 740mW
LVDS, CMOS, or demultiplexed CMOS outputs
Selectable input ranges: ±0.5V or ±1V
No missing codes
Applications
WCDMA cellular basestation transceivers
Power amplifier linearisation
Cable modem termination systems
For further information, including a copy of Linear Technology's High Speed ADC Products Brochure, please click here
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